About this role
SoC Design Engineer at Intel. Location: Austin, Texas, United States. Role: Developing logic designs, Integrating IP blocks, Optimizing power and timing Requirements: Bachelor's in Electrical/Computer Engineering; 3+ years in microarchitecture/RTL design; clock domain crossing, low-power design; RTL tools, SoC integration. Category: Engineering Seniority: Mid Level Tools: RTL design, SoC integration tools, NoC architectures, Low-power design, Power-area-timing optimization Commitment: Full Time Workplace: Hybrid Languages: English