About this role
Principal Engineer – Physical Design at Microchiphr. Location: Malaysia. Role: planning floorplans, tuning routing, mentoring juniors Requirements: Principal Physical Design engineer with 6-10 years ASIC/IC tapeout experience; strong in floorplanning, routing, low-power design, verification, and scripting. Category: Engineering Seniority: Senior Level Tools: Synopsys ICC/PT, Cadence Innovus, Cadence PVS, Design Compiler, Genus, PrimeTime, TCL, PERL, Shell, Verilog, VHDL, UNIX/Linux, ETs Commitment: Full Time Workplace: Onsite Languages: English