About this role
Staff Design Verification Engineer, UAL and PCIe Subsystems at Marvell. Location: Santa Clara, California, United States. Role: developing architecture, writing tests, debugging failures Requirements: Bachelor's in CE/EE/CS with 5+ years verification and firmware/software development experience; experience with SystemVerilog, UVM, scripting, EM tools, Linux, C++ and ARM assembly; strong testplan and verification skills. Category: Engineering Seniority: Senior Level Tools: System Verilog, UVM, Python, Perl, EDA Verification tools, Linux O.S., C++, ARM assembly Commitment: Full Time Workplace: Onsite Languages: English