About this role
Digital Design Intern at Silvaco. Location: Cairo, Cairo Governorate, Egypt. Role: contributing designs, developing skills, using tools Requirements: Bachelor's in Electronics Engineering, strong Verilog RTL skills, knowledge of CDC/RDC, ASIC/FPGA flows, STA and timing constraints; System Verilog/UVM and Unix/Linux familiarity preferred. Category: Engineering Seniority: Entry Level Tools: Verilog RTL, System Verilog, UVM, Unix/Linux, shell scripting, STA Commitment: Full Time Workplace: Onsite Languages: English