About this role
Technologist, RFIC Design Engineer at Western Digital. Location: San Jose, California, United States. Role: designing circuits, simulating circuits, verifying layouts Requirements: Hands-on RF and analog IC design experience in CMOS (40nm and below), transistor/block/module architecture, layout and verification, EDA tool proficiency, and track record of production design releases. Category: Engineering Seniority: Mid Level Tools: Cadence, Mentor, Siemens, Ansys Commitment: Full Time Workplace: Onsite Languages: English