About this role
Silicon Physical Design Engineer at Meta. Location: Sunnyvale, California, United States. Role: leading implementation, developing methodology, performing signoff Requirements: Bachelor's in CS/CE or equivalent, 8+ years physical design implementation for digital SoCs, experience with advanced nodes (3nm or below), EDA tools, timing/power/physical verification, and methodology development. Category: Engineering Seniority: Senior Level Tools: EDA tools, Python, Tcl Commitment: Full Time Workplace: Onsite Languages: English