About this role
CPU RTL Design Engineer at Samsung Electronics. Location: Bangalore, Karnataka, India. Role: driving microarchitecture, coding RTL, verifying designs Requirements: 4-10 years in digital IC/RTL design; strong Verilog/SystemVerilog; CPU architectures (RISC-V/ARM); familiar with EDA tools; scripting (Python/Perl/Tcl). Category: Engineering Seniority: Mid Level Tools: Verilog, SystemVerilog, Xcelium, VCS, Synopsys Design Compiler, Python, Perl, Tcl, AMBA AXI, AMBA AHB, AMBA APB Commitment: Full Time Workplace: Onsite Languages: English