About this role
Staff Mixed-Signal Verification Engineer at Renesas Electronics. Location: Chandler, Arizona, United States. Role: verifying chips, modeling circuits, debugging issues Requirements: B.S./M.S. in EE or CE, 8+ years mixed-signal verification or modeling experience, SystemVerilog and Verilog-AMS experience, power management/PMIC knowledge, strong communication and teamwork. Category: Engineering Seniority: Senior Level Tools: SystemVerilog, Verilog-AMS Commitment: Full Time Workplace: Onsite Languages: English