About this role
Sr. Engineer, Post-silicon Validation at Ayar Labs. Location: San Jose, California, United States. Role: Lead Validation Strategy, Drive Product Bring-up, Validate Component Requirements: Master's in Electrical Engineering; 2+ years validation/test experience; Python for automation; knowledge of Ethernet/PCIe; SoC validation planning; optical/electrical characterization. Category: Engineering Seniority: Senior Level Tools: BERT, DCA, OSA, Ethernet, PCIe, Python Commitment: Full Time Workplace: Onsite Languages: English