About this role
Principal Design Engineer at Cadence. Location: Bangalore, India. Role: Crafting verification plans, Executing verification plans, Collecting coverage Requirements: 8+ years of design verification experience, BS (or higher) in EE/Computer Engineering, strong technical and interpersonal skills. Category: Engineering Seniority: Senior Level Tools: System Verilog, UVM, Perl, Unix shell Commitment: Full Time Workplace: Onsite Languages: English