About this role
Physical Design Engineer II (eInfochips Inc) at Arrow. Location: San Jose, California, United States. Role: executing synthesis, performing PNR, ensuring signoff Requirements: Bachelor's or equivalent, 7+ years physical design experience (synthesis, PnR, STA, timing convergence), proficiency with Innovus/Tempus/Quantus and TCL scripting, sub-7nm and SoC experience preferred. Category: Engineering Seniority: Senior Level Tools: Innovus, Tempus, Quantus, TCL, Cadence, Synopsys Commitment: Full Time Workplace: Onsite Languages: English