About this role
Engineer II, Analog Mixed-Signal Design at SiTime Corporation. Location: Rijswijk, Zuid-Holland, Netherlands. Role: designing circuits, performing simulations, documenting blocks Requirements: M.S. or Ph.D. in Electrical Engineering required; expertise in CMOS analog/mixed-signal design, MATLAB and VerilogA, Cadence tools, circuit simulation, layout oversight, and strong communication skills. Category: Engineering Seniority: Mid Level Tools: MATLAB, VerilogA, Cadence Commitment: Full Time Workplace: Onsite Languages: English