About this role
Design for Test (DFT) Engineer at Selinc. Location: Boise, Idaho, United States. Role: reviewing schematics, advocating testability, developing guidelines Requirements: B.S. in electrical/electronics or equivalent, several years hands-on electronics test or board-level design experience, expertise in schematics/layout, test development, and DFT practices. Category: Engineering Seniority: Mid Level Tools: boundary scan/JTAG, flying probe, bed-of-nails, SPEA 4080, Keysight i3070, Python, C Commitment: Full Time Workplace: Onsite Languages: English