About this role
FPGA Jr. Engineer Position at Satellogic. Location: Buenos Aires, Buenos Aires, Argentina. Role: designing ip, verifying ip, testing hardware Requirements: Bachelor's in electronics/electrical/computer engineering; experience with Verilog/VHDL, testbenches, hardware testing, Linux, C/Python/Bash/Tcl, and version control; good English communication. Category: Engineering Seniority: Entry Level Tools: Verilog, VHDL, Linux, C, Python, Bash Shell, Tcl, Git, SVN Commitment: Full Time Workplace: Onsite Languages: English