About this role
Physical Design Engineer at Intel. Location: Guadalajara or Zapopan. Role: implementing design, optimizing performance, conducting verification Requirements: Degree in electrical/computer engineering (BS/MS/PhD) with relevant years, RTL-to-GDS implementation experience, proficiency with Cadence or Mentor Graphics EDA tools, static timing and power analysis, and advanced English. Category: Engineering Seniority: Entry Level Tools: Cadence, Mentor Graphics, Electronic Design Automation (EDA) Commitment: Full Time Workplace: Hybrid Languages: English