About this role
IP Design Verification Engineer at Qualcomm India Private Limited. Location: Chennai, Tamil Nadu, India. Role: creating infrastructure, executing tests, debugging failures Requirements: Experience in design verification, UVM and System Verilog; creating DV infrastructure, test plans, debugging, and coverage closure. Bachelor’s degree in engineering or related field and relevant hardware engineering experience. Category: Engineering Seniority: Entry Level Tools: UVM, System Verilog, LPDRR, PCIe, CXL Commitment: Full Time Workplace: Onsite Languages: English