About this role
Senior Design Verification Infrastructure Engineer - VIPs and Testbench at Sifive. Location: Bengaluru, Karnataka, India. Role: developing VIPs, maintaining platform, integrating testbenches Requirements: 3+ years design verification experience with System Verilog and UVM; experience building VIPs/AIPs; familiarity with Chisel/Scala/Python and verification infrastructure; BS/MS/PhD in EE/CE/CS typically expected. Category: Engineering Seniority: Mid Level Tools: System Verilog, UVM, Chisel, Scala, Python, EDA, DevOps, CI / CD Commitment: Full Time Workplace: Onsite Languages: English