About this role
Physical Design Engineer at Fortell. Location: San Jose, California, United States. Role: executing synthesis, running pnr, troubleshooting flows Requirements: 7+ years physical design experience (synthesis, PnR, STA, timing convergence, physical verification); Bachelor's in EE/CE/CS or equivalent experience; proficiency with Innovus, Tempus, Quantus, TCL; experience with EM/IR, PDN, LEC and sub-7nm/SoC design. Category: Engineering Seniority: Senior Level Tools: Innovus, Tempus, Quantus, TCL, Cadence, Synopsys Commitment: Full Time Workplace: Onsite Languages: English