About this role
Digital Design Verification Trainee at Semtech. Location: Aguascalientes, Aguascalientes, Mexico. Role: verifying circuits, modeling behavior, creating documents Requirements: B.Sc. in Electrical or Computer Engineering, basic knowledge of constrained-random verification (UVM/OVM/AVM/VMM), SystemVerilog and scripting (Python, TCL, Perl, C), Unix/Linux familiarity, strong analytical and communication skills. Category: Engineering Seniority: Entry Level Tools: UVM, OVM, AVM, VMM, SystemVerilog, Python, TCL, Perl, C, Unix, Linux Commitment: Full Time Workplace: Onsite Languages: English