About this role
Design Engineer Verification (2026 New College Graduate) at GlobalFoundries. Location: Richardson, Texas, United States. Role: reviewing designs, developing testbench, creating tests Requirements: Bachelor's or Master's in Electrical/Electronics/Computer Engineering with computer architecture/VLSI focus, ≥3.0 GPA, knowledge of Verilog/System-Verilog, RISC-V, UNIX, assembly, and verification/IP/SOC processes; strong communication and documentation skills. Category: Engineering Seniority: Entry Level Tools: Verilog, System-Verilog, RISCV, UNIX, Assembly Commitment: Full Time Workplace: Onsite Languages: English