About this role
Analog Layout Principal Engineer at Marvell. Location: Pavia, Lombardy, Italy. Role: drawing layouts, managing team, analyzing verification Requirements: Extensive analog custom layout experience in CMOS/FinFET, proven track record of high-performance analog circuit layout and production tape-outs, team management experience, and proficiency with Cadence Virtuoso VXL, Synopsys Custom Compiler, and Mentor Graphics Calibre. Category: Engineering Seniority: Senior Level Tools: Cadence Virtuoso VXL, Synopsys Custom Compiler, Mentor Graphics Calibre Commitment: Full Time Workplace: Onsite Languages: English