About this role
Engineer-II - IP Design at Microchiphr. Location: Hyderabad, Telangana, India. Role: developing RTL, designing IP, verifying IP Requirements: BSEE/MSEE in Electronics or Telecommunications, 2+ years digital IP/SoC development experience, strong Verilog/VHDL and FPGA design flow skills, EM skills in RTL, and strong English communication. Category: Engineering Seniority: Entry Level Tools: Verilog, VHDL, System Verilog, Synplify, Modelsim, Libero, MATLAB, C, AMBA, AXI, AHB, APB, CDC Commitment: Full Time Workplace: Onsite Languages: English