About this role
IP and Sub-system Design Verification Engineer at Intel. Location: Bangalore, Karnataka, India. Role: verifying designs, developing plans, debugging issues Requirements: Develop and execute IP functional verification plans, build test benches and simulation models, debug presilicon issues, and collaborate with architects and RTL/physical design teams. Requires advanced verification experience. Category: Engineering Seniority: Senior Level Commitment: Full Time Workplace: Hybrid Languages: English