About this role
Senior Design Engineer II at Microchip Technology Inc.. Location: Hyderabad, Telangana, India. Role: designing logic, coding rtl, specifying constraints Requirements: Expertise in digital/logic design, FSM and micro-architecture; RTL coding with SystemVerilog or VHDL; familiarity with ARMv7-A architectures and AXI/AHB/APB buses; Masters in Electronics/VLSI and 5+ years experience. Category: Engineering Seniority: Senior Level Tools: SystemVerilog, VHDL, AXI, AHB, APB, Armv7-A, Cortex A7, Cortex A9 Commitment: Full Time Workplace: Onsite Languages: English