About this role
<p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt"><strong><em><span style="font-family:Verdana, sans-serif">Job Title: </span></em></strong><strong><em><span style="font-family:Verdana, sans-serif">Senior Manager, Electrical Engineering</span></em></strong></span></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt"><strong><em><span style="font-family:Verdana, sans-serif">Job Code: 38175</span></em></strong></span></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt"><strong><em><span style="font-family:Verdana, sans-serif">Job Location: Rochester, NY (Onsite)</span></em></strong></span></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt"><strong><em><span style="font-family:Verdana, sans-serif">Job Schedule: 9/80: Employees work 9 out of every 14 days- totaling 80 hours worked- and have every other Friday off</span></em></strong></span></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Calibri, sans-serif"> </p> <p style="line-height:normal;margin:0.0in 0.0in 8.0pt;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt"><strong><span style="font-family:Verdana, sans-serif;color:black">Job Description:</span></strong></span></p> <p style="line-height:normal;margin:0.0in 0.0in 8.0pt;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt"><span style="font-family:Verdana, sans-serif">L3Harris Mission Critical Communications Sector is seeking a highly motivated, team-oriented Senior Manager of Electrical Engineering to </span><span style="font-family:Verdana, sans-serif">provide organizational management, leadership, and direction to </span><span style="font-family:Verdana, sans-serif">our New Product Introduction Test Engineering Development Teams. This </span><span style="font-family:Verdana, sans-serif">role encompasses functional management and direct technical contribution</span><span style="font-family:Verdana, sans-serif"> for the hardware test development teams, spanning from development to the production launch for new products. The successful candidate will have the technical knowledge capable of comprehensive production test development and execution for new products, including fulfilment of project / program requirements as well as optimization of test processes to ensure customer quality in a volume production environment. Additional </span><span style="font-family:Verdana, sans-serif">duties include overseeing the planning and staffing of the team, ensuring that resources are allocated effectively for product development projects and programs, with an emphasis on continuous improvement and adherence to established engineering processes.</span></span></p> <p style="line-height:normal;margin:0.0in 0.0in 8.0pt;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt"><strong><span style="font-family:Verdana, sans-serif;color:black">Essential Functions:</span></strong></span></p> <ul style="margin-bottom:0.0in;margin-top:0.0px"> <li style="line-height:normal;margin:0.0in 0.0in 8.0pt 0.0px;font-size:14.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Provide leadership to the definition, development, scheduling, and execution of production test solutions & infrastructure for all new products in collaboration with both Engineering and New Product Launch teams to ensure a comprehensive test approach of project / program deliverables, inclusive of stations, fixtures, functional, ICT test software, JTAG, & Flying Probe.</span></li> </ul> <ul style="margin-bottom:0.0in;margin-top:0.0px" type="disc"> <li style="color:black;line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt"><span style="font-family:Verdana, sans-serif;color:windowtext">Ensure </span><span style="font-family:Verdana, sans-serif">allocation of resources is aligned with business priorities and identify solutions for the optimal utilization of resources</span></span></li> <li style="margin-bottom:0.0in;line-height:normal;margin-top:0.0in;margin-right:0.0in;font-size:14.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Optimize, harmonize, and standardize engineering execution through enhanced processes, tools, governance, and execution.</span></li> <li style="margin-bottom:0.0in;line-height:normal;margin-top:0.0in;margin-right:0.0in;font-size:14.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Establish strategic working relationships with engineering project managers as well as functional teams and technical leaders.</span></li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt"><span style="font-family:Verdana, sans-serif">Provide leadership in the development of technical staff through strategic hiring, mentoring, and training. Responsible for team coaching and development, as well as career counseling for each individual with performance evaluations and career discussions throughout the year. </span><span style="font-family:Verdana, sans-serif;color:black">Hire, attract and retain top talent, creating a cohesive culture that fosters innovation, execution, and collaboration. Provide mentorship and growth opportunities for engineering and management staff within the organization.</span></span></li> <li style="margin-bottom:0.0in;line-height:normal;margin-top:0.0in;margin-right:0.0in;font-size:14.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Review BOEs and other artifacts / deliverables for technical quality / process adherence.</span></li> <li style="margin-bottom:0.0in;line-height:normal;margin-top:0.0in;margin-right:0.0in;font-size:14.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Ability to obtain a US DoD Secret Clearance.</span></li> </ul> <p style="margin-bottom:0.0in;line-height:normal;margin-top:0.0in;margin-right:0.0in;font-size:14.0pt;font-family:Calibri, sans-serif"> </p> <p style="line-height:normal;margin:0.0in 0.0in 8.0pt;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt"><strong><span style="font-family:Verdana, sans-serif;color:black">Qualifications:</span></strong></span></p> <ul style="margin-bottom:0.0in;margin-top:0.0px"> <li style="line-height:normal;margin:0.0in 0.0in 8.0pt 7.6667px;font-size:14.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Bachelor’s Degree with a minimum of 12 years of prior related experience. Graduate Degree with a minimum of 10 years of prior related experience. In lieu of a degree, minimum of 16 years of prior related experience in engineering.</span></li> </ul> <p style="line-height:normal;margin:0.0in 0.0in 8.0pt;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt"><strong><span style="font-family:Verdana, sans-serif;color:black"> </span></strong></span></p> <p style="line-height:normal;margin:0.0in 0.0in 8.0pt;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt"><strong><span style="font-family:Verdana, sans-serif;color:black">Preferred Additional Skills:</span></strong></span></p> <ul style="margin-bottom:0.0in;margin-top:0.0px"> <li style="line-height:normal;margin:0.0in 0.0in 8.0pt 8.0px;font-size:14.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Experience with automated systems including electronic test.</span></li> <li style="line-height:normal;margin:0.0in 0.0in 8.0pt 8.0px;font-size:14.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">MS degree in Electrical, Computer Engineering, or Engineering Management.</span></li> <li style="line-height:normal;margin:0.0in 0.0in 8.0pt 8.0px;font-size:14.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Experience working in an Agile Scrum development process.</span></li> <li style="margin:0.0in 0.0in 0.0in 8.0px;line-height:normal;font-size:14.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt"><span style="font-family:Verdana, sans-serif">Experience leading and managing engineering teams, specifically </span><span style="font-family:Verdana, sans-serif">leading complex production test development and execution programs.</span></span></li> <li style="line-height:normal;margin:0.0in 0.0in 8.0pt 8.0px;font-size:14.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Experience in digital, analog, and RF circuitry design/troubleshoot.</span></li> <li style="line-height:normal;margin:0.0in 0.0in 8.0pt 8.0px;font-size:14.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Measurement of key performance parameters using analyzers, generators, oscilloscopes, and meters</span></li> <li style="margin:0.0in 0.0in 0.0in 8.0px;line-height:normal;font-size:14.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Experience with requirements management throughout the product development or program life cycle.</span></li> <li style="line-height:normal;margin:0.0in 0.0in 8.0pt 8.0px;font-size:14.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Expertise in evaluation of designs for testability; Working knowledge of the fundamentals of In-Circuit Test (ICT), functional board level testing, unit and system level testing, coverage analysis</span></li> <li style="margin:0.0in 0.0in 0.0in 8.0px;line-height:normal;font-size:14.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Effective leadership, communication, and interpersonal skills, with an ability to collaborate with a diverse group of stakeholders to include leadership and other engineering functions.</span></li> <li style="margin:0.0in 0.0in 0.0in 8.0px;line-height:normal;font-size:14.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Proficiency in Office, Visio, JIRA, DOORS Requirements Management Software, and Project. Familiarity with LabVIEW/TestStand or comparable programming language.</span></li> </ul> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Calibri, sans-serif"> </p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Calibri, sans-serif"> </p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">In compliance with pay transparency requirements, the salary range for this role in New York state is $133,000 - $247,000. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. L3Harris also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements.</span></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">#LI-MA1</span></p>