About this role
<p><span style="color:black"><em><span style="font-size:14.0pt"><span style="font-family:Verdana, Geneva, sans-serif"><strong>Job Title: Lead, Electrical Engineering – Hardware Design</strong></span></span></em></span></p> <p><span style="color:black"><em><span style="font-size:14.0pt"><span style="font-family:Verdana, Geneva, sans-serif"><strong>Job Code: 38214</strong></span></span></em></span></p> <p><span style="color:black"><em><span style="font-size:14.0pt"><span style="font-family:Verdana, Geneva, sans-serif"><strong>Job Location: Cincinnati, OH</strong></span></span></em></span></p> <p><span style="color:black"><em><span style="font-size:14.0pt"><span style="font-family:Verdana, Geneva, sans-serif"><strong>Job Schedule:</strong> <strong>4/10: Employess work 10 hour shifts, 4 days a week</strong></span></span></em></span></p> <p> </p> <p><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><strong><span style="font-family:'Verdana', sans-serif">Job Description:</span></strong></span></span></p> <p> </p> <p><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">This Electrical Engineering position is in a fast-paced and dynamic environment, requiring tasking flexibility to meet ever changing customer objectives. It will require the ability to work within a team structure as well as work independently with minimal supervision. Excellent communication skills, both verbal and written, are crucial.</span></span></span></p> <p> </p> <p><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><strong><span style="font-family:'Verdana', sans-serif">Essential Functions:</span></strong></span></span></p> <p> </p> <ul> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">Analog and digital design of ruggedized electronics for ordnance applications.</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">Circuit tolerance analyses using hand calculations and Spice tools</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">Requirements development, refinement, and compliance.</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">Generate test plans and test reports related to product performance (Brassboard, Design Verification, Qualification, Firing Properties, etc.)</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">Lead and direct test activities in all phases of product development cycle.</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">Lead failure investigations using structured tools (8D, Fishbone, Cause & Effect, etc.).</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">Generate material for and lead design reviews for all phases of the product development cycle.</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">Act as primary technical interface to internal and external customers.</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">Provide inputs (material and labor estimates) for Requests for Proposals (RFPs)</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">Generate Engineering Orders (EOs) and Engineering Change Proposals (ECPs)</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">Mentor electrical engineering staff</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">Lead and multi-task across several projects simultaneously</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">Ability to obtain a Secret clearance.</span></span></span></li> </ul> <p> </p> <p><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><strong><span style="font-family:'Verdana', sans-serif">Qualifications:</span></strong></span></span></p> <p> </p> <ul style="margin-bottom:11.0px"> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">Bachelor’s degree in electrical engineering, Computer Engineering or related field of study and minimum 9 years of prior relevant experience. Graduate Degree in electrical engineering or related field and a minimum of 7 years of prior related experience. In lieu of a degree, minimum of 13 years of prior related experience.</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">5+ years of experience designing with basic analog building blocks including differential amplifiers, op amps, LDOs, filters, and data converters.</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">5+ years of experience designing with basic digital building blocks including logic gates, flip flops, timers, and filters.</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">4+ years of experience with power conversion concepts (AC/DC, DC/DC, and DC/AC, Linear and Switching Supplies)</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">5+ years of experience in troubleshooting using standard lab equipment (oscilloscopes, function generators, meters, etc.)</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">4+ years of experience with schematic capture and/or board layout utilities (Altium, PADS, etc.)</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">4+ years of experience lead a large-scale technical project from start to completion with minimal guidance</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">4+ years of experience in preparing and participating in design reviews (internal and external)</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">4+ years of experience in creating Technical Documentation (Test Plans, Test Reports, Drawings, etc.) </span></span></span></li> </ul> <p> </p> <p><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><strong><span style="font-family:'Verdana', sans-serif">Preferred Additional Skills:</span></strong></span></span></p> <p> </p> <ul> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">4+ years of experience with Temperature sensors, MEMs accelerometers, differential pressure sensors, and GYROs</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">5+ years of experience with serial communication buses including UART, SPI, and I2C</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">5+ years of experience with Root Cause analysis </span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">4+ years of experience with general design best practices (EMI suppression, ESD protection, and Short circuit protection)</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">5+ years of experience with power supply and power conditioning design</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">5+ Years designing Electronic Safety and Arming Devices (ESADs) and Ignition Safety Devices IAW MIL-STD-1316 and MIL-STD-1901A.</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">5+ years of experience presenting ESAD/ESAF/ISD designs to the Safety Review Boards (AFSRB, FISTRP, NNMSB)</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">3+ years of experience energetic materials interfacing/testing (EFDIs, LEEFIs, Lead Charges, Boosters).</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">5+ years of design for extreme environments (Vibration, Shock, Temperature, Temperature & Humidity)</span></span></span></li> <li style="font-size:14.0pt;color:black"><span style="font-size:14.0pt;color:black"><span style="font-family:Calibri, sans-serif"><span style="font-family:'Verdana', sans-serif">Team Player with excellent communication skills to work effectively across different engineering disciplines.</span></span></span></li> </ul> <p> </p> <p><span style="color:black"><em><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">#LI-EN2</span></em></span></p>