<div class="SCXW164998223 BCX8"> <div class="OutlineElement Ltr SCXW164998223 BCX8"> Job Title: Lead, Digital Design Engineer Job Code: 38427 Job Location: Londonderry, NH Job Schedule: 9/80; Employees work 9 out of every 14 days – totaling 80 hours worked – and have every other Friday off Job Description: L3Harris Integrated Vision Solutions Londonderry, a leading designer and manufacturer of laser, night vision and electro-optic devices, is seeking a Lead Digital Design (FPGA) Engineer to pursue a career in a fast-paced company where new designs become production reality. As a member of our new product development staff, you will become a recognized contributor with product responsibility for the development of modern military electronic hardware. A variety of mixed signals, microcontrollers, and DSP/FPGA qualifications will be required to bring projects from concept to production. As a Lead Digital Design Engineer, you will be responsible for the complete firmware development lifecycle, leading the firmware development of complex projects from defining firmware requirements through release to production. You will be a key contributor in defining the firmware architecture and designing for efficiency and reuse. This role requires an energetic and motivated individual with strong communication, organization, and technical skills who works well in a multi-disciplinary team. Essential Functions: <ul style="margin-bottom:0.0in;margin-top:0.0px"> <li style="margin:0.0in 0.0in 8.0pt 0.0px;line-height:107%;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Lead the estimation, planning, and execution of firmware design and development</li> <li style="margin:0.0in 0.0in 8.0pt 0.0px;line-height:107%;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Developing FPGA VHDL code for Microchip/Xilinx (AMD)/Altera (Intel)/Other platforms</li> <li style="margin:0.0in 0.0in 8.0pt 0.0px;line-height:107%;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Developing top level test benches for simulating and verifying design architecture </li> <li style="margin:0.0in 0.0in 8.0pt 0.0px;line-height:107%;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Designing and developing image and video processing algorithms and protocols</li> <li style="margin:0.0in 0.0in 8.0pt 0.0px;line-height:107%;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Implementing vendor specific and 3rd party IP</li> <li style="margin:0.0in 0.0in 8.0pt 0.0px;line-height:107%;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Translation of system requirements into firmware requirements</li> <li style="margin:0.0in 0.0in 8.0pt 0.0px;line-height:107%;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Designing firmware architecture, documenting, and reviewing with peers and stakeholders</li> <li style="margin:0.0in 0.0in 8.0pt 0.0px;line-height:107%;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Design, develop, and document hardware / software interfaces</li> <li style="margin:0.0in 0.0in 8.0pt 0.0px;line-height:107%;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Lead the post-design support and troubleshooting utilizing appropriate tools including oscilloscopes, logic/spectrum analyzers and other test equipment</li> <li style="margin:0.0in 0.0in 8.0pt 0.0px;line-height:107%;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Collaborating with a cross-discipline team of mechanical, optical, software, digital and analog designers</li> </ul> Qualifications: <ul style="margin-bottom:12.4pt;margin-top:0.0px"> <li style="margin:0.0in 0.0in 12.4pt 0.0px;line-height:normal;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Bachelor’s Degree and minimum 9 years of prior relevant experience. Graduate Degree and a minimum of 7 years of prior related experience. In lieu of a degree, minimum of 13 years of prior related experience in Digital Electrical Engineering.</li> <li style="margin:0.0in 0.0in 12.4pt 0.0px;line-height:normal;font-size:14.0pt;font-family:verdana, geneva, sans-serif">9+ plus years of firmware development experience</li> <li style="margin:0.0in 0.0in 12.4pt 0.0px;line-height:normal;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Working experience using VHDL (preferred) or Verilog with a minimum of 8 years proven track record of successful advanced digital designs</li> <li style="margin:0.0in 0.0in 12.4pt 0.0px;line-height:normal;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Direct experience interfacing with microcontrollers and/or knowledge of embedded processor implementations</li> </ul> Preferred Additional Skills: <ul style="margin-bottom:10.0pt;margin-top:0.0px"> <li style="margin:0.0in 0.0in 10.0pt 0.0px;line-height:115%;font-size:14.0pt;font-family:Calibri, sans-serif">Bachelors Degree in Digital Electrical Engineering preferred</li> <li style="margin:0.0in 0.0in 10.0pt 0.0px;line-height:115%;font-size:14.0pt;font-family:Calibri, sans-serif">Expert in digital FPGA design, preferably with video and image processing experience</li> <li style="margin:0.0in 0.0in 10.0pt 0.0px;line-height:115%;font-size:14.0pt;font-family:Calibri, sans-serif">Experience with high-speed data communication considered a significant plus </li> <li style="margin:0.0in 0.0in 10.0pt 0.0px;line-height:115%;font-size:14.0pt;font-family:Calibri, sans-serif">Experience with OrCAD, PSpice, Cadence Allegro or equivalent CAD/CAE tools </li> <li style="margin:0.0in 0.0in 10.0pt 0.0px;line-height:115%;font-size:14.0pt;font-family:Calibri, sans-serif">Proficient with Git and Jira</li> <li style="margin:0.0in 0.0in 10.0pt 0.0px;line-height:115%;font-size:14.0pt;font-family:Calibri, sans-serif">Experience with Jenkins and DevSecOps tool chains</li> <li style="margin:0.0in 0.0in 10.0pt 0.0px;line-height:115%;font-size:14.0pt;font-family:Calibri, sans-serif">Experience with DOORS Requirements Management</li> <li style="margin:0.0in 0.0in 10.0pt 0.0px;line-height:115%;font-size:14.0pt;font-family:Calibri, sans-serif">Proficient at distilling system requirements into firmware requirements</li> <li style="margin:0.0in 0.0in 10.0pt 0.0px;line-height:115%;font-size:14.0pt;font-family:Calibri, sans-serif">Proficient with firmware configuration management tools. Git preferred</li> <li style="margin:0.0in 0.0in 10.0pt 0.0px;line-height:115%;font-size:14.0pt;font-family:Calibri, sans-serif">Proficient with ModelSim or equivalent tool to simulate, debug, and verify digital design</li> <li style="margin:0.0in 0.0in 10.0pt 0.0px;line-height:115%;font-size:14.0pt;font-family:Calibri, sans-serif">Knowledge of design architecture trade-offs for size, weight, power and cost (SWaP-C) preferably for Electro-Optical systems</li> </ul> #LI-CB1 </div> </div>

Lead, Digital Design Engineer (Londonderry, NH, US, 03053) @ L3Harris Technologies, Inc.

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