Job Title: Manager, Electrical Engineering Job Code: 37552 Job Location: Cincinnati, OH Job Schedule: 4/10: Employees work 10 hour days (Monday - Thursday) Job Description: As an Electrical Engineering Manager in the ESAD Group, you will be responsible for managing and developing the Electrical Engineering staff that supports product development and production support. The manager will be responsible for leading and overseeing engineers during requirements development, concept development, detailed design, and product testing. A secondary role of the Electrical Engineering manager will involve supporting direct program work as a Staff-level Electrical Engineer. L3Harris Engineering Managers possess the skills of a top-notch influencer, motivator, and leader who can grow a team of engineers while advancing their own career in a management role and in engineering leadership. Essential Functions: Engineering Individual Contributor <ul style="margin-bottom:0.0in;margin-top:0.0px" type="disc"> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Analog and digital design of ruggedized electronics for ordnance applications.</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Circuit tolerance analyses using hand calculations and Spice tools</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Requirements development, refinement, and compliance.</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Generate test plans and test reports related to product performance (Brassboard, Design Verification, Qualification, Firing Properties, etc.)</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Lead and direct test activities in all phases of product development cycle.</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Lead failure investigations using structured tools (8D, Fishbone, Cause & Effect, etc.).</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Generate material for and participate in design reviews for all phases of the product development cycle.</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Act as technical interface to internal and external customers.</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Provide inputs (material and labor estimates) for Requests for Proposals (RFPs).</li> </ul> Management <ul style="margin-bottom:0.0in;margin-top:0.0px" type="disc"> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Define, maintain, and improve the department’s development processes and best practices.</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Ensure staff are properly using best practices and the development processes on their assigned programs.</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Provide regular labor and resource planning to support programs and activities.</li> </ul> <ul style="margin-bottom:0.0in;margin-top:0.0px" type="disc"> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Actively support all phases of hiring activities for the team</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Support management of morale and work to proactively mitigate attrition.</li> </ul> <ul style="margin-bottom:0.0in;margin-top:0.0px" type="disc"> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Support succession planning and identification/development of key talent.</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Carry out performance management and goal setting of all direct reports and indirect reports, both formal and informal. Provide meaningful, constructive feedback to ensure the development of each staff member.</li> </ul> <ul style="margin-bottom:0.0in;margin-top:0.0px" type="disc"> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Lead performance improvement plan formulation and execution as needed.</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Proactively support reward and recognition activities for the staff members. Develop and submit merit recommendations during the yearly merit review cycle.</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Perform conflict resolution between teammates as required.</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Take an active role in the professional development of each staff member. May include identification, guidance, and support of formal training, on-the-job training, mentoring, and/or new program assignments.</li> </ul> <ul style="margin-bottom:0.0in;margin-top:0.0px" type="disc"> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Proactively mentor, coach, assist, and/or provide additional help to engineers in the analysis, design, build, integration, test, validation, verification, documentation, and/or maintenance of products.</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Foster an individual and team culture of Continuous Improvement (CI)</li> </ul> Qualifications: <ul style="margin-bottom:0.0in;margin-top:0.0px" type="disc"> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Bachelor’s Degree and minimum 9 years prior related experience. Graduate Degree with a minimum of 7 years of prior related experience. In lieu of a degree, minimum of 13 years of prior related experience.</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Experience designing with basic analog building blocks including differential amplifiers, op amps, LDOs, filters, and data converters</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Experience designing with basic digital building blocks including logic gates, flip flops, timers, and filters</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Experience with power supply and power conditioning design</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Experience with power conversion concepts (AC/DC, DC/DC, and DC/AC, linear and switching supplies)</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Experience with serial communication buses including UART, SPI, and I2C</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Experience leading and managing product development teams</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Experience with temperature sensors, MEMS accelerometers, differential pressure sensors, and gyros</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Experience with general design best practices including EMI suppression, ESD protection, and short circuit protection</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Experience with module design including component selection, circuit analysis, circuit design, and layout</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Experience troubleshooting using standard lab equipment including oscilloscopes, function generators, and meters</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Experience with modeling and simulation utilities including LTSpice and MATLAB/Simulink</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Experience with schematic capture and/or board layout utilities including Altium and PADS</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Experience leading a large-scale technical project from start to completion with minimal guidance</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Experience preparing for and participating in design reviews, both internal and external</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Experience creating technical documentation including test plans, test reports, and drawings</li> <li style="line-height:normal;margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Experience with root cause analysis</li> </ul> Preferred Additional Skills: <ul style="margin-top:0.0in;margin-bottom:0.0in" type="disc"> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;line-height:107%;font-size:14.0pt;font-family:verdana, geneva, sans-serif">BSEE/CompE +11 years of experience, or MSEE/CompE +9 years of experience</li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;line-height:107%;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Experience designing Electronic Safety and Arming Devices (ESADs) and Ignition Safety Devices IAW MIL-STD-1316 and MIL-STD-1901A</li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;line-height:107%;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Experience with energetic materials interfacing/testing (EFDIs, LEEFIs, Lead Charges, Boosters).</li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;line-height:107%;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Experience with design for extreme environments (Vibration, Shock, Temperature, Temperature & Humidity)</li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;line-height:107%;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Team Player with excellent communication skills to work effectively across different engineering disciplines.</li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;line-height:107%;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Outstanding communication (both verbal and written), collaboration, time management, presentation, and organizational skills</li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:8.0pt;line-height:107%;font-size:14.0pt;font-family:verdana, geneva, sans-serif">Able to obtain a Secret clearance </li> </ul>

Manager, Electrical Engineering (Cincinnati, OH, US, 45245) @ L3Harris Technologies, Inc.

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