About this role
<p><em><strong><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Job Title: Lead, Electrical Engineer </span></strong></em></p> <p><em><strong><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Job Code: 37314</span></strong></em></p> <p><em><strong><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Job Location: Cincinnati, OH</span></strong></em></p> <p><em><strong><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Job Schedule: 4/10: Employees work 10 hour shifts, 4 days a week</span></strong></em></p> <p> </p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong>Job Description:</strong></span></p> <p> </p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">L3Harris Fuzing & Ordnance Systems (FOS) designs ruggedized electronics for a variety of military fuzing and ordnance systems. Our staff has led or supported the development, design, qualification, and manufacture of numerous Electronic and Electro-Mechanical fuzing devices for numerous large defense contractors and direct government customers. We are looking for talented, motivated and creative engineers to join our team.</span></p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">This Electrical Engineering position is in a fast-paced and dynamic environment requiring tasking flexibility to meet ever changing customer objectives. It will require the ability to lead and work within a technical team, as well as independently with minimal supervision. Excellent communication skills, both verbal and written, are crucial.</span></p> <p> </p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong>Essential Functions:</strong></span></p> <p> </p> <ul type="disc"> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Develop and refine requirements.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Interface with customers and cross-functional teams.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Circuit design and component selection, designing ruggedized electronics for ordnance applications that meet customer requirements.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Perform simulations and circuit tolerance analyses.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Prepare and execute to test plans and generate test reports.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Assist in failure investigations using structured methods.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Lead team members to achieve program objectives.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Mentor less experienced engineers.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Prepare materials for and participate in design reviews.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Generate engineering change orders.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Manage multiple projects simultaneously.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Travel: 5-10%</span></li> </ul> <p style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"> </p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong>Qualifications:</strong></span></p> <p> </p> <ul type="disc"> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Bachelor’s Degree and minimum 9 years of prior relevant experience. Graduate Degree and a minimum of 7 years of prior related experience. In lieu of a degree, minimum of 13 years of prior related experience.</span></li> </ul> <p style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"> </p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong>Preferred Additional Skills:</strong></span></p> <p> </p> <ul> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Proven experience in analog and digital circuit design, power circuit design, and sensor integration.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Proficient in design with analog components (differential amplifiers, op amps, filters) and digital components (logic gates, timers).</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Experienced in power supply and converter design.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Skilled in using simulation tools (SPICE, MATLAB/Simulink) and design software (Altium, PADS).</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Competent in circuit analysis, module design, and best practices (EMI, ESD protection, DFM).</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Creates test plans/reports and conducts comprehensive testing.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Troubleshoots with standard lab equipment (oscilloscopes, function generators).</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Leads technical projects and produces detailed technical documentation.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Experienced in participating in design reviews and root cause analysis.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Adept at multitasking across several projects.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Self-starter, executes project tasking with minimal supervision</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Experience with Electronic Safety and Arming Devices (ESADs) and presenting to Safety Review Boards.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Knowledge of extreme environmental design and testing with energetic materials.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Effective communicator and team player.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Ability to obtain a Secret clearance.</span></li> </ul> <p style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"> </p> <p style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">#LI-EN2</span></p>