About this role
<p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Job Title: Senior Specialist, Electrical Engineer</span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"> </p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Job Code: 39474</span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"> </p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Job Location: Palm Bay, Florida</span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif"> </span></strong></p> <p style="margin:0.0in 0.0in 8.0pt;line-height:107%;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;line-height:107%;font-family:Verdana, sans-serif">Job Schedule: 9/80: Employees work 9 out of every 14 days – totaling 80 hours worked, and have every other Friday off</span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><em><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:black"> </span></em></p> <p style="line-height:normal;margin:0.0in 0.0in 8.0pt;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:black">Job Description:</span></strong></p> <p style="line-height:normal;margin:0.0in 0.0in 8.0pt;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">L3Harris in Palm Bay, Florida currently has an opening for a Digital Hardware Engineer. In this role, you will develop digital circuits for data acquisition and computing systems. Responsibilities will include generation of specifications, component selection, high-speed digital circuit design, simulation, analyses, support of PWB layout, and integration & verification testing. </span></p> <p style="line-height:normal;margin:0.0in 0.0in 8.0pt;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:black">Essential Functions:</span></strong></p> <ul style="margin-bottom:0.0in;margin-top:0.0px"> <li style="margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Perform CCA Design specifying Mixed Signal Technology circuits consisting of A/D, D/A, Processors, I/O communication and Programmable Logic (FPGA, CPLD) circuits.</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:black">Utilize thorough understanding of digital CCA design process including requirements generation, preliminary design, peer reviews, detailed design, test plan generation, and integration and test.</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:black">Design including components such as TI DSP processors, Freescale or Intel Processors, Microcontrollers, FPGA, CPLD, and volatile/non-volatile memory (DDRx, SRAM, ROM, Flash…).</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:black">Working with board technologies such as HDI, Meg6, and back drilling.</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:black">Design high speed memory interfaces (DDRx).</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:black">Utilize schematic software suite used to generate circuit card designs (Schematic Capture, Constraint-Driven, Layout, Simulation, and Timing Analysis).</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:black">Work independently in generating digital CCA design solutions.</span></li> <li style="margin:0.0in 0.0in 8.0pt 0.0px;line-height:107%;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:107%;font-family:Verdana, sans-serif">Ability to obtain a US Security Clearance</span></li> </ul> <p style="line-height:normal;margin:0.0in 0.0in 8.0pt;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:black">Qualifications:</span></strong></p> <ul style="margin-bottom:0.0in;margin-top:0.0px"> <li style="line-height:normal;margin:0.0in 0.0in 8.0pt 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Bachelor’s Degree and minimum 6 years of prior relevant experience. Graduate Degree and a minimum of 4 years of prior related experience. In lieu of a degree, minimum of 10 years of prior related experience.</span></li> </ul> <p style="line-height:normal;margin:0.0in 0.0in 8.0pt;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:black">Preferred Additional Skills:</span></strong></p> <ul style="margin-bottom:0.0in;margin-top:0.0px"> <li style="margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:black">Experience with high-speed memory and network interfaces and protocols is desired.</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:black">Self-motivated individual with the ability to lead a design team.</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:black">Ability to work in a team environment and negotiate solutions with Hardware / Software Engineering and Systems Engineering is preferred.</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Knowledge of High Complexity Digital Design Techniques and Devices.</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Hardware debugging skills & experience in operation of Signal Generator, Logic Analyzer, Digital Oscilloscopes</span></li> </ul> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"> </p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:white">#LI-EK1</span></p>