About this role
<p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Job Title: Lead Integration and Test Engineer</span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif"> </span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Job Code: 40259</span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif"> </span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Job Location: Palm Bay, FL </span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif"> </span></strong></p> <p style="margin:0.0in 0.0in 8.0pt;line-height:107%;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;line-height:107%;font-family:Verdana, sans-serif">Job Schedule: 9/80: Employees work 9 out of every 14 days – totaling 80 hours worked, and have every other Friday off</span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif"> </span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Job Description:</span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif"> </span></strong></p> <p style="margin:0.0in 0.0in 8.0pt;line-height:107%;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:107%;font-family:Verdana, sans-serif">We are seeking an experienced Test Engineer with a strong electrical engineering foundation and solid software development background. The ideal candidate will be responsible for analyzing Units Under Test (UUTs), developing test strategies, creating test cases, and implementing fault detection and fault isolation testing. This role will also include developing test set software on VDATS and supporting the design of Interface Test Adapters (ITAs).</span></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif"> </span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Essential Functions:</span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif"> </span></strong></p> <ul style="margin-bottom:0.0in;margin-top:0.0px"> <li style="line-height:115%;margin:0.0in 0.0in 0.0in 24.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Analyze Units Under Test to understand functionality, interfaces, failure modes, and test requirements.</span></li> <li style="line-height:115%;margin:0.0in 0.0in 0.0in 24.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Develop test requirements, test procedures, and detailed test cases for electrical and electronic systems.</span></li> <li style="line-height:115%;margin:0.0in 0.0in 0.0in 24.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Design and implement fault detection and fault isolation tests.</span></li> <li style="line-height:115%;margin:0.0in 0.0in 0.0in 24.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Develop, debug, and maintain test set software using VDATS.</span></li> <li style="line-height:115%;margin:0.0in 0.0in 0.0in 24.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Support the design, development, and validation of Interface Test Adapters.</span></li> <li style="line-height:115%;margin:0.0in 0.0in 0.0in 24.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Interpret schematics, wiring diagrams, interface control documents, and technical specifications.</span></li> <li style="line-height:115%;margin:0.0in 0.0in 0.0in 24.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Troubleshoot hardware and software issues during test development and execution.</span></li> <li style="line-height:115%;margin:0.0in 0.0in 0.0in 24.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Collaborate with systems, electrical, software, and manufacturing engineering teams.</span></li> <li style="line-height:115%;margin:0.0in 0.0in 0.0in 24.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Document test methods, results, failures, and corrective actions.</span></li> <li style="line-height:normal;margin:0.0in 0.0in 8.0pt 24.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Ability to obtain a US Security Clearance</span></li> </ul> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif"> </span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Qualifications:</span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif"> </span></strong></p> <ul style="margin-bottom:0.0in;margin-top:0.0px"> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Bachelor’s Degree and minimum 9 years of prior relevant experience. Graduate Degree and a minimum of 7 years of prior related experience. In lieu of a degree, minimum of 13 years of prior related experience.</span></li> </ul> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif"> </span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Preferred Additional Skills:</span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif"> </span></strong></p> <ul style="margin-bottom:0.0in;margin-top:0.0px"> <li style="line-height:115%;margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Experience with automated test equipment, data acquisition, and instrumentation.</span></li> <li style="line-height:115%;margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Familiarity with LabVIEW, LabWindows CVI, Python, C, C++, Rust and other scripting or programming languages.</span></li> <li style="line-height:115%;margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Experience in Aerospace, Defense and Depot Level Maintenance, or other regulated engineering environments.</span></li> <li style="line-height:115%;margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Knowledge of requirements-based testing and formal verification processes and Fault insertion demonstrations</span></li> <li style="line-height:115%;margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Experience supporting production test, depot test, or maintenance test environments.</span></li> <li style="line-height:115%;margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Experience developing test solutions for electronic or electromechanical systems.</span></li> <li style="line-height:115%;margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Strong understanding of electrical circuits, signals, instrumentation, and troubleshooting methods.</span></li> <li style="line-height:115%;margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Software development experience in test environments.</span></li> <li style="line-height:115%;margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Experience with VDATS or similar automated test systems.</span></li> <li style="line-height:115%;margin:0.0in 0.0in 0.0in 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Ability to analyze UUT behavior and create effective fault isolation and diagnostic tests.</span></li> <li style="line-height:115%;margin:0.0in 0.0in 8.0pt 0.0px;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Experience designing or supporting ITAs, test fixtures, cable assemblies, or interface hardware.</span></li> </ul> <p style="line-height:115%;margin:0.0in 0.0in 8.0pt;font-size:11.0pt;font-family:Aptos, sans-serif"> </p> <p style="line-height:115%;margin:0.0in 0.0in 8.0pt;font-size:11.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif;color:white">#LI-CS2</span></p>