About this role
<p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong><em>Job Title: RF </em></strong><strong>Engineering Technician D</strong><strong><em> </em></strong></span></p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong><em>Job Code: </em></strong><strong><em>35835</em></strong></span></p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong><em>Job Location: </em></strong><strong>San Diego, CA</strong></span></p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong><em>Job Schedule: </em></strong>9/80 (employee's work 9 out of every 14 days - totaling 80 hours worked - and have every other Friday off)</span></p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><em> </em></span></p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong>Job Description:</strong></span></p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">L3Harris in San Diego, CA is seeking an experienced <strong>RF engineering technician</strong> to <strong>support</strong> the <strong>design</strong> and <strong>manufacturing of Tracking</strong>, <strong>Telemetry</strong>, and <strong>Command (TT&C) products</strong> for <strong>airborne</strong> and <strong>space-based applications</strong>. As an RF technician, you will be directly involved in the <strong>integration</strong> and <strong>test</strong> of <strong>advanced satellite communication links</strong>, <strong>digital telemetry</strong>, and <strong>signal processing technology</strong>. You will be responsible for <strong>performing design verification testing</strong> and be a liaison between engineering and production test teams.</span></p> <p> </p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong>Essential Functions:</strong></span></p> <ul type="disc"> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Independently <strong>perform design verification testing</strong> of <strong>circuit cards</strong> and higher-level <strong>RF assemblies</strong></span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong>Troubleshoot circuits</strong> to the component level in support of determining failure root cause</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong>Write alignment</strong> and <strong>test procedures</strong> with minimal engineering assistance</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Oversee <strong>environmental testing</strong> of <strong>developmental hardware</strong></span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Serve as liaison between engineering and production teams during new product introduction</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Ability to obtain a DOD Secret security clearance</span></li> </ul> <p> </p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong>Required Qualifications (one of the following):</strong></span></p> <ul> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong>High School Diploma</strong> or equivalent and a minimum of <strong>8 years</strong> of prior relevant experience</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">2 years post-Secondary/<strong>Associates Degree</strong> with a minimum of <strong>4 years</strong> of prior related experience.</span></li> </ul> <p> </p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong>Preferred Additional Skills:</strong></span></p> <ul type="disc"> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Minimum <strong>4 years </strong>experience performing <strong>testing</strong> and <strong>troubleshooting</strong> <strong>circuit card assemblies</strong></span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Minimum <strong>4 years</strong> experience using <strong>basic electrical measurement equipment</strong>: <strong>digital multi-meter</strong>, <strong>oscilloscope</strong>, <strong>power supply</strong>, <strong>function generator</strong>, <strong>logic analyzer</strong></span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Minimum <strong>4 years</strong> experience using <strong>RF measurement equipment</strong>: <strong>signal generator</strong>, <strong>spectrum analyzer</strong>, <strong>network analyzer</strong>, <strong>power meter</strong>, <strong>noise figure meter</strong></span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Demonstrated familiarity with basic <strong>RF parameters</strong>: <strong>bandwidth</strong>, <strong>reflection</strong>, <strong>transmission</strong>, <strong>S-Parameters</strong>, <strong>spurious</strong> and <strong>harmonic signals</strong>, <strong>noise figure</strong>, <strong>gain compression</strong>, <strong>intermodulation</strong></span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Demonstrated familiarity with basic <strong>analog/digital/DC circuit parameters</strong>: <strong>voltage</strong>/<strong>current</strong>/<strong>power</strong>, <strong>logic levels</strong>, <strong>timing</strong></span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Ability to <strong>read</strong> and <strong>interpret electrical schematics</strong> and <strong>assembly drawings</strong></span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Active DOD security clearance (Secret/TS)</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Experience with <strong>RF circuitry through mmW</strong> (<strong>Ka band</strong> or higher)</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Experience with military or space qualified hardware designs</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Experience performing <strong>design verification testing</strong> with or without engineering supervision</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Experience characterizing <strong>SSPA devices</strong> or <strong>assemblies</strong> using <strong>load pull equipment</strong></span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Experience characterizing <strong>SSPA devices</strong> or <strong>assemblies</strong> <strong>nonlinear vector network analyzers</strong></span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Experience <strong>performing tests</strong> on <strong>power conversion circuitry</strong> (<strong>DC/DC</strong> <strong>converters</strong>, etc.)</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong>Soldering certification</strong> or ability to obtain one</span></li> </ul> <p> </p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">In compliance with pay transparency requirements, the salary range for this role in California, Massachusetts, New Jersey, Washington, and the Greater D.C, Denver, or NYC areas is $75,000 - $139,000. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. L3Harris also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements.</span></p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt;color:white">#LI-CD1</span></p>