About this role
<div><span style="font-size:14.0px"><span style="font-family:arial, helvetica, sans-serif"><strong>Division:</strong> RMI Engineering</span></span> </div> <div><span style="font-size:14.0px"><span style="font-family:arial, helvetica, sans-serif"><strong>Employment Status:</strong> Exempt</span></span></div> <div><span style="font-size:14.0px"><span style="font-family:arial, helvetica, sans-serif"><strong>Salary Grade:</strong> 111</span></span></div> <div><span style="font-size:14.0px"><span style="font-family:arial, helvetica, sans-serif"><strong>Shift: </strong></span></span></div> <div><span style="font-size:14.0px"><span style="font-family:arial, helvetica, sans-serif"><strong>Requisition ID:</strong> 77302 </span></span></div> <div><span style="font-size:14.0px"><span style="font-family:arial, helvetica, sans-serif"><span style="color:#000000"><em>Please be aware that if you are selected to formally interview for an internal position you will be required to notify your current manager. Please refer to the Employee Transfers Guidelines posted on Skylink.</em></span></span></span></div> <div> </div><div><div style="padding:10.0px 0.0px;border:1.0px solid transparent"><div style="font-size:16.0px;word-wrap:break-word"><H2 style="font-size:1.0em;margin:0.0px"><b>Description</b></H2> </div><div><p><strong>About the Role</strong></p> <p>We are seeking a <strong>Principal RF and Analog Design Engineer</strong> to design, integrate, and characterize high‑performance RF and analog circuits for next‑generation products. This role requires deep hands‑on expertise, strong system‑level understanding, and the ability to technically lead complex mixed‑signal designs from concept through silicon qualification and production.</p> <p>You will work closely with digital, layout, validation, firmware, and product teams to deliver robust, manufacturable solutions for demanding RF and analog applications</p></div></div><div style="padding:10.0px 0.0px;border:1.0px solid transparent"><div style="font-size:16.0px;word-wrap:break-word"><H2 style="font-size:1.0em;margin:0.0px"><b>Responsibilities</b></H2> </div><div><p><strong>RF & Analog Design</strong></p> <ul type="disc"> <li>Architect, design, and simulate <strong>RF and analog circuit blocks</strong>, including:</li> <ul type="circle"> <li>LNAs, mixers, VCOs/PLLs</li> <li>Data converters (ADCs/DACs)</li> <li>Bias generation, bandgap references, LDOs</li> <li>Baseband amplifiers and filters</li> </ul> <li>Translate <strong>system‑level requirements</strong> (noise, gain, linearity, power, phase noise) into robust circuit implementations</li> <li>Perform detailed <strong>schematic design, simulation, and optimization</strong> across PVT corners</li> </ul> <div align="center"><hr align="center" size="2" width="100%"></div> <p><strong>System & Architecture Contribution</strong></p> <ul type="disc"> <li>Collaborate with system architects to define <strong>RF signal chains and analog subsystems</strong></li> <li>Drive tradeoff analysis between performance, power, area, and cost</li> <li>Support <strong>RF budgeting</strong> (NF, IP3, phase noise, jitter, spur analysis)</li> </ul> <div align="center"><hr align="center" size="2" width="100%"></div> <p><strong>Silicon Implementation & Signoff</strong></p> <ul type="disc"> <li>Work closely with layout engineers on:</li> <ul type="circle"> <li>Floor planning</li> <li>Sensitive routing and matching</li> <li>EM, IR, and substrate coupling considerations</li> </ul> <li>Own or support <strong>block‑level and top‑level signoff</strong>:</li> <ul type="circle"> <li>AC/DC performance</li> <li>Noise and linearity</li> <li>Stability and yield margin</li> </ul> </ul> <div align="center"><hr align="center" size="2" width="100%"></div> <p><strong>Validation & Debug</strong></p> <ul type="disc"> <li>Lead <strong>silicon bring‑up, lab characterization, and debug</strong></li> <li>Correlate measurement results with simulation</li> <li>Identify root causes and drive fixes for silicon issues</li> <li>Support yield improvement and production ramp</li> </ul> <div align="center"><hr align="center" size="2" width="100%"></div> <p><strong>Technical Leadership</strong></p> <ul type="disc"> <li>Define best practices for RF/analog design and verification</li> <li>Mentor Junior engineers and help refine circuits and architectures</li> <li>Influence roadmap and architectural decisions</li> <li>Serve as a technical point of contact across cross‑functional teams</li> </ul></div></div><div style="padding:10.0px 0.0px;border:1.0px solid transparent"><div style="font-size:16.0px;word-wrap:break-word"><H2 style="font-size:1.0em;margin:0.0px"><b>Required Experience and Skills</b></H2> </div><div><ul type="disc"> <li>Bachelor’s, Master’s, or PhD in <strong>Electrical Engineering</strong> or related field</li> <li>Typically <strong>10+ years</strong> of hands‑on RF and/or analog IC design experience</li> <li>Proven track record of <strong>tape‑out ownership</strong> and silicon success</li> <li>Strong understanding of:</li> <ul type="circle"> <li>RF fundamentals (noise, linearity, matching, phase noise)</li> <li>Analog circuit design techniques</li> <li>CMOS/BiCMOS device physics</li> </ul> <li>Experience with industry tools:</li> <ul type="circle"> <li>Cadence Virtuoso, SpectreRF, ADS, EMX or equivalent</li> </ul> <li>Comfortable working across <strong>process nodes</strong> and foundries</li> </ul></div></div><div style="padding:10.0px 0.0px;border:1.0px solid transparent"><div style="font-size:16.0px;word-wrap:break-word"><H2 style="font-size:1.0em;margin:0.0px"><b>Desired Experience and Skills</b></H2> </div><div><ul type="disc"> <li>Strong DSP fundamentals</li> <li>Mixed‑signal integration experience (RF + digital SoC)</li> <li>High‑speed or precision analog experience</li> <li>Familiarity with packaging, test, and manufacturing constraints</li> <li>Experience supporting <strong>volume production</strong></li> </ul> <div align="center"><hr align="center" size="2" width="100%"></div> <p><strong>Soft Skills & Mindset</strong></p> <ul type="disc"> <li>Strong problem‑solving and debugging skills</li> <li>Ability to communicate complex technical concepts clearly</li> <li>Ownership mindset with attention to detail</li> <li>Comfortable influencing without formal authority</li> <li>Collaborative and pragmatic approach to engineering tradeoffs</li> </ul> <p> </p> <p>#LI-CB1</p></div></div></div><p>Referral Bonus Program Reward (if eligible): Rs200,000.00 </p>