About this role
<p>If you are looking for a challenging and exciting career in the world of technology, then look no further. Skyworks is an innovator of high-performance analog semiconductors whose solutions are powering the wireless networking revolution. Through our broad technology expertise and one of the most extensive product portfolios in the industry, we are Connecting Everyone and Everything, All the Time.</p> <p> </p> <p>At Skyworks, you will find a fast-paced environment with a strong focus on global collaboration, minimal layers of management, and the freedom to make meaningful contributions in a setting that encourages creative thinking. We are excited about the opportunity to work with you and glad you want to be part of a team of talented individuals who together are changing the way the world communicates.</p> <p>Requisition ID: 77625 </p><div><div style="padding:10.0px 0.0px;border:1.0px solid transparent"><div style="font-size:16.0px;word-wrap:break-word"><H2 style="font-size:1.0em;margin:0.0px"><b>Overview</b></H2> </div><div><p>Seeking an <span style="color:#333333">Digital design engineer developing complex mixed-signal ICs</span><span style="font-size:10.5pt;font-family:Arial, sans-serif;color:#333333"> </span>for EVs, Industrial Control, Industrial Power, Isolation, and other Infrastructure applications. This role will be part of the design group that is at the forefront of the EV revolution, working to develop technologies that will revolutionize vehicles and enable new levels of power efficiency. <span style="color:#333333">Candidate will take a supporting or leading role depending on experience relative to other team members, but regardless of experience level, candidate will be involved in all aspects of the design process from system conceptualization to mass production. For example, candidate will participate in digital system architecture, block- and system-level RTL design/coding, algorithm and firmware development, digital circuit back-end (e.g. synthesis, timing closure, P&R preparation, scan insertion), digital design verification, and full-chip mixed-signal verification. Responsibilities will also include detailed documentation, test vector development, lab test and evaluation, customer support, and other activities as required to achieve high-volume production.</span></p></div></div><div style="padding:10.0px 0.0px;border:1.0px solid transparent"><div style="font-size:16.0px;word-wrap:break-word"><H2 style="font-size:1.0em;margin:0.0px"><b>Responsibilities</b></H2> </div><div><ul style="margin-top:0.0in;margin-bottom:0.0in" type="disc"> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Derive requirements and architecture for Digital sub system from product specification and requirements</li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Develops innovative new designs for patenting or protecting as trade secrets</li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Participates and contributes to product definition</li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Interface with analog design teams to understand the interface requirements between analog and digital domains</li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Work with the team members to fine-tune the overall design leading to efficient implementation and verification cycles</li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Creates good documentation and reports on design results through design reviews</li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Attends design reviews to provide input and learn from other designers’ experiences</li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif"><span style="font-size:12.0pt;font-family:'Times New Roman', serif">Research design techniques through technical publications and seminars</span></li> </ul></div></div><div style="padding:10.0px 0.0px;border:1.0px solid transparent"><div style="font-size:16.0px;word-wrap:break-word"><H2 style="font-size:1.0em;margin:0.0px"><b>Minimum Requirements</b></H2> </div><div><ul style="margin-bottom:0.0in;margin-top:0.0px" type="disc"> <li style="color:#333333;text-align:left;background-color:white;margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;font-size:12.0pt;font-family:'Times New Roman', serif">MS with digital IC design experience, higher degree may reduce the work experience</li> <li style="color:#333333;text-align:left;background-color:white;margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;font-size:12.0pt;font-family:'Times New Roman', serif">Strong motivation to contribute to all facets of chip design from conceptualization to release to production</li> <li style="color:#333333;text-align:left;background-color:white;margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;font-size:12.0pt;font-family:'Times New Roman', serif">Working knowledge of digital IC circuit design in an HDL synthesis environment</li> <li style="color:#333333;text-align:left;background-color:white;margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;font-size:12.0pt;font-family:'Times New Roman', serif"><span style="background-color:white">Ability to <strong>develop RTL code</strong> and understand how RTL will map to gate-level structures</span></li> <li style="color:#333333;text-align:left;background-color:white;margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;font-size:12.0pt;font-family:'Times New Roman', serif">Knowledge of scripting/language (Python, PERL, shell, TCL)</li> <li style="color:#333333;text-align:left;background-color:white;margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;font-size:12.0pt;font-family:'Times New Roman', serif">Experience with modeling analog blocks to include in a HDL mixed mode simulation</li> <li style="text-align:left;background-color:white;margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;font-size:12.0pt;font-family:'Times New Roman', serif"><strong><span style="color:#333333">Deep understanding of the digital design flow from architecture through RTL design, verification, synthesis, </span></strong><span style="color:#333333">timing closure, P&R preparation and scan insertion</span></li> <li style="color:#333333;text-align:left;background-color:white;margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;font-size:12.0pt;font-family:'Times New Roman', serif">Good verbal and written communication skills, positive attitude, desire to learn, and willingness to work on a team</li> </ul></div></div><div style="padding:10.0px 0.0px;border:1.0px solid transparent"><div style="font-size:16.0px;word-wrap:break-word"><H2 style="font-size:1.0em;margin:0.0px"><b>Additional skills (one or more of these are highly desirable)</b></H2> </div><div><ul> <li style="text-align:left;background-color:white;font-size:12.0pt;font-family:'Times New Roman', serif"><span style="color:#333333">Competence in high-level languages (e.g. Matlab, C), scripting languages (e.g. Tcl, Perl, Python, SKILL), and version control systems (e.g. SVN, SOS)</span></li> <li style="text-align:left;background-color:white;font-size:12.0pt;font-family:'Times New Roman', serif"><span style="color:#333333">Working knowledge of System Verilog and/or UVM</span></li> <li style="text-align:left;background-color:white;font-size:12.0pt;font-family:'Times New Roman', serif"><span style="color:#333333">Experience with digital design verification, and full-chip mixed-signal verification</span></li> <li style="text-align:left;background-color:white;font-size:12.0pt;font-family:'Times New Roman', serif"><span style="color:#333333">Experience with digital IO interfaces such at SPI, I2C etc.</span></li> <li style="text-align:left;background-color:white;font-size:12.0pt;font-family:'Times New Roman', serif"><span style="color:#333333">Competence in exploring digital and system/architecture trade-offs such as memory size (ROM, RAM, FLASH, OTP, cache), clock speed, multiple clock domains, and the necessity for dedicated logic and DSP</span></li> <li style="text-align:left;background-color:white;font-size:12.0pt;font-family:'Times New Roman', serif"><span style="color:#333333">Experience with both digital front end and back end tools</span></li> <li style="text-align:left;background-color:white;font-size:12.0pt;font-family:'Times New Roman', serif"><span style="color:#333333">Familiarity with DSP techniques and algorithms</span></li> </ul></div></div></div><p>The typical base pay range for this role across the U.S. is currently USD $77,900 - $142,900 per year. Starting base pay will depend on relevant experience and skills, training and education, business needs, market demands, the ultimate job duties and requirements, and work location. Skyworks has different base pay ranges for different work locations in the U.S. Benefits include access to healthcare benefits (including a premium-free medical plan option), a 401(k) plan and company match, an employee stock purchase plan, paid time off (including vacation, sick/wellness, parental leave), among others. Employees are eligible to participate in an incentive plan, and certain roles are also eligible for additional awards, including recognition and stock. These incentives and awards are based on individual and/or company performance. </p> <p> </p> <p>Skyworks is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, sexual orientation, gender identity, national origin, disability, protected veteran status, or any other characteristic protected by law. Skyworks strives to create an accessible workplace; if you need an accommodation due to a disability, please contact us at [email protected].</p>