About this role
<p><br><img style="width:930.0px;height:205.0px" src="https://performancemanager5.successfactors.eu/OSRAMP/ams_OSRAM_RCM.jpg"></p> <p> </p> <p style="color:#fd5000">Sense the power of light</p> <p style="text-align:justify"><br>The ams OSRAM Group is a global leader in innovative light and sensor solutions. With more than 110 years of industry experience, we combine engineering excellence and global manufacturing with a passion for cutting-edge innovation enabling transformative advancements in the automotive, industrial, medical, and consumer industries. “Sense the power of light” – our success is based on the deep understanding of the potential of light and distinct portfolio of emitter and sensor technologies. Around 19,700 employees worldwide drive innovations alongside societal megatrends.<br>Find out more about us on <a href="https://ams-osram.com">https://ams-osram.com</a></p> <p style="text-align:justify"> </p> <p style="text-align:justify">The CSA division supplies sensors that bridge the gap between the world we live in and the digital world of machines. By converting physical signals - heartbeats, sounds, light waves - into data, we enable robots, cars and other devices to interact with people and improve our world. What drives CSA is a relentless desire to contribute to technology and have a meaningful impact on the world. This business thrives on solving complex problems and partnering with global leaders at the forefront of technological advancement. Our goal: to push the boundaries of sensor technology and empower innovators to make the world smarter, healthier and happier.</p> <p style="text-align:justify"><br><span style="color:#fd5000">Your new responsibilities</span></p><ul> <li>Perform Digital Physical Implementation for complex integrated circuits</li> <li>Execute all the steps of RTL2GDS flow (synthesis, floorplan, Place&Route, EMIR analysis, ECO flows)</li> <li>Interact with digital designers to refine SDC timing constraints for synthesis and place & route</li> <li>Run Static Timing Analysis (STA) and Signoff checks</li> <li>Help to debug designs at both pre- and post-silicon</li> <li>Collaborate with cross-functional teams to deliver optimized backend solutions</li> </ul><p><br><span style="color:#fd5000">Who we are looking for</span></p> <p><br><ul> <li>Master’s degree in Electronics Engineering, Electrical Engineering, Physics or similar</li> <li>Strong proficiency in digital backend design tools and flows (Cadence flow)</li> <li>Solid understanding of Signoff Checks (timing closure, signal integrity, EMIR, physical verification)</li> <li>Ability to work independently and in team environments</li> <li>Excellent problem-solving and communication skills</li> <li>Fluency in English is mandatory, Italian is beneficial</li> </ul></p> <p><br>Please contact <strong>Hana Krsul</strong> for further information via <strong><a href="mailto:[email protected]">[email protected]</a></strong> or <strong>+43 664 9665611</strong>.</p>