About this role
<p> </p> <p><span style="font-size:12.0px"><span style="font-family:Arial, Helvetica, sans-serif">作為華邦的(竹北) DRAM Circuit Designer ，你將負責替客戶設計符合需求的電路圖，與製程研發/CAD/產品測試/FAE等團隊合作，完成重要專案。工作內容包含： ，以下為工作內容、工作條件以及重要通知。</span></span></p> <p> </p> <p><span style="font-size:12.0px"><span style="font-family:Arial, Helvetica, sans-serif">【工作內容】<br> 1. DDR3/DDR4/LPDDR3/LPDDR4 Peripheral circuit design <br> 2. Full-chip verification<br> <br> 工作地點：竹北辦公室(新竹縣竹北市文興路二段539號)<br> 聘僱性質：全職 </span></span></p> <p><br> <span style="font-size:12.0px"><span style="font-family:Arial, Helvetica, sans-serif">【條件要求】<br> <br> 學歷要求：碩士<span> </span><br> 科系要求：電機電子工程相關<span> </span><span> │ 資訊工程相關</span><span> </span><span> │ 物理學相關</span><span> </span><br> 相關經驗：不拘<span> </span><br> 語言能力：英文<span> </span><span> 中級</span><span> </span><span> │ </span><span> </span><span> </span><span> </span><span> │ </span><span> </span><span> </span><span> </span><br> 管理責任：No<span> </span><br> 輪班需求：No<span> </span><br> 出差需求：無<span> </span><br> 外派需求：No<span> </span><br> 其他條件：<br> 1. Familiar with full-custom design flow <br> 2. Experiences in Peripheral circuit design of DDR3/DDR4/LPDDR3/LPDDR4 will be a plus<br> 3. Being familiar with Verilog or coding skill will be a plus</span></span></p> <p><span style="color:#ffffff"><span style="font-size:12.0px"><span style="font-family:Arial, Helvetica, sans-serif">#LI-LL1</span></span></span></p>