About this role
The Circuit and Mask Design Engineer will be responsible for the layout/design and procurement of photolithography masks in support of Micross AIT's post-CMOS wafer processing technologies, including advanced interconnect (TSV, copper RDL, and wafer bumping) and IR emitter pixel fabrication. The die and wafer layouts will successfully interface with customer CMOS pads (or I/O's) per customer specifications. Duties will include generating die layouts and wafer-level layouts for review by the cust