About this role
Medior FPGA Engineer at Sentyron. Location: Delft, Zuid-Holland, Netherlands. Role: designing FPGA, verifying designs, integrating interfaces Requirements: 3–5 years FPGA development experience (VHDL/Verilog/SystemVerilog); familiarity with simulators and toolchains; strong digital-design and verification skills; Dutch and English fluency; able to pass national security screening. Category: Information Technology Seniority: Mid Level Tools: VHDL, Verilog, SystemVerilog, VUnit, Active-HDL, Riviera-Pro, cocotb, AXI, DMA Commitment: Full Time Workplace: Onsite Languages: Dutch, English