About this role
RTL / Physical Design Engineer at Persimmons. Location: San Jose, California, United States. Role: handoff RTL, timing constraints, floorplanning Requirements: Bachelor's or Master’s in Electrical or Computer Engineering; 3+ years RTL-to-PD experience; Cadence/Synopsys toolchain knowledge; strong timing analysis and AI automation familiarity. Category: Engineering Seniority: Mid Level Tools: Cadence tools, Synopsys tools, SystemVerilog, Verilog Commitment: Full Time Workplace: Onsite Languages: English