About this role
FPGA Design Engineer at Thermoteknix Systems Ltd. Location: Waterbeach or United Kingdom. Role: designing FPGA, verifying RTL, writing constraints Requirements: SystemVerilog, Python, RTL verification; timing constraints; low power design; module specifications; code review. Category: Engineering Seniority: Senior Level Tools: SystemVerilog, Python, RTL verification, Timing constraints, Low power design, Git, SVN, Markdown, Linux command line Commitment: Full Time Workplace: Hybrid Languages: English