About this role
FPGA Engineer at D-ORBIT SPA. Location: Fino Mornasco, Italy, Italy. Role: Design FPGA, Verify FPGA, Lead verification Requirements: VHDL RTL design; Libero SoC; ModelSim; Python/TCL; high-speed interfaces; MS in CS/EE/Telecommunications; 5+ years FPGA/embedded experience; AI tools knowledge. Category: Engineering Seniority: Senior Level Tools: VHDL, Libero SoC, ModelSim, Python, TCL, SpaceWire, SPI, UART, AXI, DDR, LVDS Commitment: Full Time Workplace: Hybrid Languages: English