About this role
Senior Emulation Engineer at EnCharge AI. Location: India. Role: Set up, Maintain platforms, Develop testbenches Requirements: BS/MS/Ph.D. in EE or CS with 7+ years of SoC design experience; experience with emulation platforms (Veloce/Palladium/ZeBu) and FPGA prototyping; PCIe/UCIe, LPDDR/HBM; RTL (Verilog/SystemVerilog); hardware debugging; scripting (Python/Tcl/Perl); UVM; SystemVerilog; C/C++ is a plus. Category: Engineering Seniority: Senior Level Tools: Siemens Veloce, Cadence Palladium, Mentor ZeBu, ProFPGA, HAPS, Protium, PCIe, UCIe, LPDDR, HBM, Verilog, SystemVerilog, RTL, UVM, Python, Tcl, Perl, C, C++ Commitment: Full Time Workplace: Remote Languages: English