About this role
Memory Subsystem Enablement Verification Engineer at Advanced Micro Devices, Inc. Location: Ottawa, Ontario, Canada. Role: verify IP, develop testbench, co-verify hardware Requirements: Memory subsystem pre-silicon verification engineer with strong C/C++, SystemVerilog, IP/subsystem verification, co-verification, testbench development, and memory/IP knowledge. Category: Engineering Seniority: Mid Level Tools: C, C++, SystemVerilog, UVM, Python, Zebu Emulation, C-DPI, Git, Perforce, DDR/JEDEC, Memory IP Commitment: Full Time Workplace: Onsite Languages: English