About this role
Senior Digital Verification Engineer at Samsung Research and Development Center Israel. Location: Tel Aviv-Yafo, Tel Aviv District, Israel. Role: maintaining environments, defining methodology, developing tooling Requirements: BSc/MSc in electrical/computer engineering, 8+ years ASIC/SoC verification experience, SystemVerilog and UVM expertise, Cadence toolchain experience, scripting (Python, Perl, Bash/TCSH, Makefiles), and experience building large-scale verification infrastructures. Category: Engineering Seniority: Senior Level Tools: SystemVerilog, UVM, Cadence Xcelium, vManager, Indago, Python, Perl, Bash, TCSH, Makefiles, Linux, CI/CD, SVA Commitment: Full Time Workplace: Onsite Languages: English