About this role
Process Engineer at Power Integrations. Location: Ithaca, New York, United States. Role: clean wafers, coat wafers, align wafers Requirements: 2+ years experience in lithography, deposition and etching; BS in Science or Engineering; experience with DOE; 2+ years in relevant semiconductor processes. Category: Engineering Seniority: Mid Level Tools: Lithography, E-beam evaporation, Sputtering, RIE/ICP, ALD, PECVD, Furnace anneal, DOE Commitment: Full Time Workplace: Onsite Languages: English