About this role
Senior Engineer (Verification Engineer) at Power Device Corporation. Location: Bohemia, New York, United States. Role: Design and development, Verification and validation, Collaboration Requirements: Senior verification engineer with 8–15 years FPGA verification experience; strong HDL and verification toolset needed. Category: Engineering Seniority: Senior Level Tools: VHDL, Verilog, SystemVerilog, UVM, Xilinx Vivado, Intel Quartus, Lattice Diamond, ModelSim, Questa, Xilinx ILA, PCIe, Ethernet 1G/10G, TSN Commitment: Full Time Workplace: Onsite Languages: English