About this role
Senior FPGA Engineer at ICEYE. Location: Warsaw, Masovian Voivodeship, Poland. Role: Design FPGA, Prototype features, Coordinate testing Requirements: Extensive FPGA engineering experience, DSP knowledge, prototyping in Python/Matlab/C/C++, Git workflows, and strong English communication. Category: Engineering Seniority: Senior Level Tools: FPGA, Python, Matlab, C, Git, CI/CD, Embedded Linux Commitment: Full Time Workplace: Hybrid Languages: English