About this role
Junior FPGA Engineer at STARK. Location: Berlin, Berlin, Germany. Role: design FPGA, implement FPGA, test FPGA Requirements: 0-2 years experience; Bachelor’s or Master’s in Electrical/Electronic/Computer Engineering; proficiency in VHDL/Verilog/SystemVerilog; FPGA tooling (Xilinx Vivado, Intel Quartus); DSP fundamentals; scripting in Python or C/C++. Category: Engineering Seniority: Entry Level Tools: VHDL, Verilog, SystemVerilog, Xilinx Vivado, Intel Quartus, ModelSim, Questa, Python, C, C++, AXI, SPI, I2C, UART Commitment: Full Time Workplace: Onsite Languages: English