About this role
Package Design Engineer | Semiconductor at Micross. Location: Apopka or Raleigh. Role: designing packages, extracting parasitics, optimizing layouts Requirements: Bachelor's in engineering; 8+ years semiconductor packaging design experience; strong Cadence Allegro APD+ skills; experience with interposer/substrate, 2.5D/3D packages, SI/PI and thermal analysis tools. Category: Engineering Seniority: Senior Level Tools: Cadence Allegro Package Designer Plus (APD+), Celsius PowerDC, Sigrity Advanced SI II, Sigrity Advanced PI II, AWR, Momentum, HFSS Commitment: Full Time Workplace: Onsite Languages: English