About this role
FPGA AI/ML Engineer (part time) at Riverside Research. Location: Fairborn, Ohio, United States. Role: designing FPGA, integrating systems, testing systems Requirements: U.S. citizenship required. Bachelor's degree in engineering, computer science, math, physics or related; 12+ years FPGA development, 5+ years Vivado/Vitis, 2+ years Python/Matlab; proficiency with debugging digital logic and Office 365 tools. Category: Engineering Seniority: Senior Level Tools: Vivado, Vitis, VHDL, Verilog, HLS, Python, C/C++, Matlab, Office 365, Microsoft Word, Microsoft Excel, Microsoft PowerPoint Commitment: Part Time, Full Time Workplace: Onsite Languages: English